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07/01
Intel Pentium 4 1.6 & 1.8Ghz was released on July 2nd. These CPUs are based around the Willamette core and are expected to be released in the Socket 423 form factor only.
Intel Celeron 900 was released on July 2nd.
Intel Mobile Celeron 850 was released on July 2nd.
Windows XP RC1 (Professional and Home Editions) was released on July 2nd.
Windows.NET Server Beta 3, the Server Editions of Windows XP, are expected to be released on July 2nd.
Intel Price Cuts occurred on July 15th. See the Intel CPU Prices page for additional information.
Intel Pentium III 1.13Ghz processor, based around the Coppermine core, is expected to be released in June. This CPU is expected to be available in SECC2 only due to cooling issues.
Intel Pentium III-S (Tualatin core) 1.26Ghz, with 512Kb L2 cache, was released on July 18th. See the initial Server Tualatin Roadmap entry for additional information.
Windows XP RC2 (Professional and Home Editions) was released on July 28th.
Intel Mobile Pentium III-M (Tualatin core) was released on July 30th at clock speeds of 866Mhz, 933Mhz, 1Ghz and 1.13Ghz. These mobile Tualatin processors contain 512Kb of on-die L2 cache. See the Server Tualatin Roadmap entry for additional information.
Intel i830M (Almador-M) chipset was released on July 30th. The i830M chipset features Intel's ICH3 south bridge, which provides the featureset of ICH2 with the addition of support for 6 USB ports. Almador-M will provide support for the Mobile PIII Tualatin.
VIA C3 (C5C Ezra core) CPU was released in Q3, with an initial clock speed of 800Mhz. Ezra is built on a 0.15 micron process and includes 128Kb L1 and 64Kb L2 cache, 3DNow! support and the support for 100 and 133Mhz FSB speeds.
08/01
Internet Explorer 5.5 SP2 was released on August 2nd.
Netscape 6.1 was released on August 9th.
SiS 645 chipset for Intel Pentium 4 was announced n August 9th, with the first motherboard released on December 9th. SiS 645 features support for PC133 SDRAM, PC2100 DDR SDRAM and the faster 333Mhz PC2700 DDR SDRAM. The SiS 645 also supports AGP 4X, ATA100, AC97, 6xUSB ports, 100Mb/s Ethernet, HomePNA and up to 3Gb of memory. The North (SiS645) and South (SiS 961) bridges will be connected by SiS' MuTIOL 533Mb/s bus.
Initial benchmarks from SiS' reference motherboard show that the SiS645 is an excellent performer. The SiS 645 performs better than VIA's P4X266, and almost on a par with Intel's i850, with PC2100 DDR SDRAM. When using PC2700 DDR SDRAM SiS' 645 chipset easily beats the P4X266 in all benchmarks, and even performs better than Intel's RDRAM-based i850 chipset under the majority of benchmarks.
ATI Radeon 8500 (R200 / Radeon 2) was announced on August 14th, with initial shipments expected in Late September. The R200 core is a 0.15 micron enhanced version of ATI's Radeon 256, featuring full support for Microsoft's DirectX 8.1 standard. The Radeon 8500 features a core clock speed of 275Mhz and a DDR memory clock of 275Mhz (giving 8.8Gb/s of memory bandwidth, compared to 7.3Gb/s provided my the GeForce3). The architecture of the R200 core provide 4 pixel pipelines with 2 texture units per pipeline, giving a fill rate of 1.1Gpixels/s and 2.2Gtexels/s on the Radeon 8500. It is interesting to note that the 3 texture units per pipeline feature of the Radeon 256 core has been dropped due to lack of software support. The memory controller of the RV200 has also been slightly enhanced, providing support for 256-bit fetches, although it is not as powerful as the crossbar found in the GeForce3. The R200 core also features ATI's TRUFORM, SMARTSHADER and SMOOTHVISION technologies.
ATI's TRUFORM technology aims to increase the quality of a 3D scene by increasing the polygon count, and is basically an implementation of DirectX 8's N-Patch technology. This is achieved by converting the polygon data into a curved surface and then recreating the 3D data with a higher polygon count. The effect of TRUFORM is to increase the smoothness of 3D objects in a scene. A particularly useful feature of TRUFORM is that this technology can easily be leveraged into existing games via software patches.
ATI's SMARTSHADER technology, provided by the Pixel Tapestry II unit, is an implementation of DirectX 8.1's vertex and pixel shader specifications. The difference between the vertex and pixel shader specifications between DirectX 8 (as implemented in nVidia's GeForce3) and DirectX 8.1 (implemented in the Radeon 2) is essentially an increase in the programmatic capabilities of the Pixel shader. See the DirectX 8.1 Roadmap entry for more details of Pixel Shader v2.0. The increased complexity of the pixel shader allows effects such as true Phong shading, Ansiotropic lighting, Advanced Bump Mapping and Procedural textures (mathematical specification of texture data preventing the need for memory access) which were not possible with DirectX 8's Pixel shader v1.1. An important feature of the DirectX 8.1 pixel shader specification is its ability to process up to 6 input textures in a single pass, which is expected to provide significant performance benefits to future games.
ATI's SMOOTHVISION technology provides the R200 core with true multisampling Anti-Aliasing. Unlike the fixed function Quincunx AA of the GeForce3, SMOOTHVISION provides support for programmable and random sample points, which is intended to increase the quality and reduce the level of artefacts associated with Full Screen Anti-Aliasing. The R200 core allows up to 16 programmable sample modes and use up to 16 samples per pixel.
In addition to the features outlined above, the R200 core features an improved version of ATI's HyperZ memory management technology and improved fixed-function T&L performance due to the Charisma Engine II unit. The improvements made in HyperZ II include a 20% increase in Z compression over HyperZ I and a better implementation of HierarchicalZ (which discards pixels based on the Z buffer before they reach the rendering pipelines). The Charisma Engine II provides a significant increase for fixed function transformation and lighting (i.e. DirectX 7 T&L rather than DirectX 8's Vertex Shader T&L), being able to process over 60M triangles/s.
The R200 core also features support for ATI's Hydravision multi-monitor technology, allowing all combinations of CRT, Digital Flat Panel and TV outputs, and has an enhanced video featureset. ATI's Video Immersion II provides hardware accelerated MPEG2 decoding with motion compensation and iDCT. Video Immresion II also provides enhanced deinterlacing and frame rate conversion algorithms.
The Radeon 8500 is expected to retail for around $399. Initial performance figures show that the R200 core is potentially significantly stronger then the NV20 core found in the GeForce3. The T&L performance of the R200 is significantly better than that of NV20 already, although the fill rate appears to be worse than that of the NV20. This, however, is very likely to be a driver issue as the R200 drivers are very immature compared to those of GeForce3, and the available memory bandwidth of the Radeon 8500 is significantly higher.
ATI Radeon 7500 (RV200) was announced on August 14th, with initial shipments expected in Mid September. The RV200 core is a hybrid between the R100 core of the Radeon 256 and the R200 core. The 0.15 micron RV200 core combines the enhanced memory controller and Hydravision support of the R200 with the featureset of the R100 - i.e. 2 pipelines with 3 texture units per pipeline and DirectX 7 support. The Radeon 7500 provides a core clock speed of 290Mhz and a memory clock of 230Mhz DDR (compared to the 183/183Mhz of the Retail Radeon 256) and provides performance competitive with the GeForce2 Pro. The Radeon 7500 is expected to retail for around $199.
ATI FireGL 8800 was announced on August 14th. This is the professional version of the Radeon 8500 designed to compete with nVidia's Quadro in the Workstation market. The specs of the FireGL 8800 are the same as those for the Radeon 8500.
SoundBlaster Audigy was released on August 14th, with shipments expected to begin in September. The next generation SoundBlaster is based around the EMU10K2 sound processor, which offers four times the processing power of the EMU10K processor used in the SoundBlaster Live! series. Soundblaster Audigy features a new version of EAX entitled EAX ENHANCED HD.
EAX ENHANCED HD supports the following games oriented features: Multi-Environment (four simultaneous audio environments), Environment Morphing (audio transitioning from one environment to another), Environment Panning (3D spatialisation and localisation of an upcoming or distant environment), Environment Reflections (simulating sound bouncing off surfaces) and Environment Filtering (simulates sound from both indoor and outdoor environments).
As well as enhancing game audio, EAX ENHANCED HD also provides the following features for music: Audio Clean-Up (removal of hiss from MP3's), Time Scaling (Speeds up or slows down audio playback without changing the pitch or audio quality), EAX ADVANCED HD Audio Effects (environmental audio presets and special effects) and DREAM (the creation of enhanced surround sound from a stereo source).
Audigy is expected to be available in three formats - Platinum, which includes Firewire support and a remote control, MP3+ which has MP3 software included and X-Gamer which includes a games bundle. The Platinum model is expected to retail for $199, with the MP3+ and X-Gamer models going for around $99.
VIA P4X266 chipset, formally known as the PX266, for Intel's Northwood and Willamette CPU's was released on August 14th with availability expected in October. The P4X266 is essentially a version of VIA's KT266 revision B chipset with a Pentium 4 bus interface. The P4X266 North Bridge features support for PC133 SDRAM or PC1600/PC2100 DDR SDRAM and AGP4X. The VT8233 South Bridge is also provided with the KT266 and Apollo Pro 266 chipsets and features AC97, 6 USB ports, Ethernet/HomePNA 10/100 and ATA/100. North and South Bridge are linked by VIA's 8-bit 266MB/s V-Link bus and an optional VPX chip allows the support of 4x64-bit 66Mhz PCI slots.
The P4X266 is expected to be priced around 25-30% lower than Intel's PC133-based Brookdale and initial performance figures have shown that its performance is closer to that of the RDRAM-based i850 than the SDRAM-based i845. Unless Intel licence VIA a Pentium 4 bus licence, however, many of the big name motherboard manufacturers may not supply boards based around this chipset.
AMD Price Cuts, for Desktop Duron and Mobile processors, occurred on August 20th. See the AMD CPU Prices page for additional information.
Mobile AMD Athlon 4 1.1Ghz was released on August 20th.
Mobile AMD Duron 900 was released on August 20th.
AMD Duron (Morgan) 1Ghz Desktop CPU was released on August 20th, with the Morgan core replacing the previous Spitfire core. See the Mobile Duron Roadmap entry for additional information about the Morgan core. Initial benchmarks show that the Morgan core offers performance closer to an Athlon Thunderbird than the previous Spitfire core of Duron at the same clock speed.
Windows XP (Professional and Home Editions) was released to manufacturing on August 24th.
Intel Pentium 4 1.9 & 2Ghz, based on the Willamette core, was released on August 26th. These CPU's are expected to be released in both Socket 423 and Socket 478 form factors.
Intel Pentium III (Tualatin core) 1.13 & 1.2Ghz, with 256Kb L2 cache, were released on August 26th. See the initial Server Tualatin Roadmap entry for additional information.
Intel Price Cuts was released on August 26th. See the Intel CPU Prices page for additional information.
AMD Price Cuts occurred on August 26th. See the AMD CPU Prices page for additional information.
ALi Aladdin P4 (M1671) chipset for the Intel Pentium 4 was announced on August 27th, with mass production expected in Q4. The M1671 features support for PC100/133 SDRAM as well as PC1600, 2100 & 2700 DDR SDRAM. The M1671 is expected to retail for $31 in mass quantities.
Internet Explorer 6 was released on August 27th. IE6 is not a major revision over IE5.x with new features including integrated media playback, a media bar, automatic picture resizing, enhanced integrated search and a discussion panel which can be used with supporting web sites. Other features include the adoption of P3P for enhanced privacy, SMIL 2.0 for interactive media presentations and enhanced DOM and CSS functionality.
Intel Celeron 950, 1, 1.1Ghz were released on August 31st. These processors are based around the Coppermine-128 core.
09/01
VIA KT266A chipset was released on September 2nd. The KT266A is based around VIA's KT266 chipset, but features an enhanced memory controller in the North Bridge (VT8366A) providing tighter FSB timings, deeper data and instruction queuing and an 8 Quadwords/cycle memory transfer burst rate (compared to 4 QW/cycle on the KT266). Boards based around this chipset will feature VIA's VT8233 or VT8233C South Bridge chips. The VT8233 features support for ATA100, 6xUSB, 6xPCI, 6 channel AC97, MC97, 10/100 Ethernet and HomePNA. The VT8233C adds an integrated 3COM Ethernet controller for high quality network support.
Initial benchmarks indicate that the KT266A provides a notable increase in system speed over the KT266 as well as overtaking the AMD760 and SiS735 chipsets is the majority of benchmarks. The KT266A outperforms the KT266 by up to 5% in office-style application benchmarks, with a 15-20% increase possible in applications with heavy memory utilisation.
Intel i845 chipset (Brookdale), formally known as i845A or Brookdale SDR, for use with the Pentium 4 'Northwood', was released on September 11th. Brookdale is the first Intel chipset to be built on a 0.18micron process and uses a 593 pin FC-BGA packaging.
The Memory Controller Hub (MCH) of Brookdale supports up to 3GB of both SDR (PC100 and PC133) and DDR (PC1600 and PC2100) SDRAM, although legal issues with Rambus mean that manufacturers will not be able to make use of this facility until Q1 2002. The MCH offers a 1MB on-die Write Cache, which acts like a simple L3 cache, alongside very deep Buffers (an In Order Queue depth of 12 levels, compared to 8 in the P4X266 and i850) to maximise the limited memory bandwidth offered by SDR SDRAM. The MCH also supports an increased number of open memory pages (24, compared to 8 on the i850) to help reduce memory latency.
The Integrated Controller Hub (ICH) of Brookdale is Intel's ICH2, which has been used with all chipsets since the i815E/i820E. ICH2 provides support for ATA-100, four USB ports (two hubs), integrated 5.1 surround-sound audio and LAN/System manageability functions.
The SDR version of the i845 performs up to 25% slower than the RDRAM based i850, with most benchmarks showing a 10-20% reduction in performance in comparison to the i850. It should be noted, however, that the forthcoming DDR incarnation may be able to perform similarly to the i850. This is a significant performance delta - a 2.4Ghz P4 on i845 may perform only as well as a 1.6Ghz P4 on i850 - but on the positive side initial reviews have shown i845 boards to be particularly stable.
VIA C3 866Mhz was released on September 11th. See the C3 Ezra core Roadmap entry for additional information.
Nintendo Gamecube (N-Cube) was released in Japan on September 14th. The N-Cube is powered by an IBM PowerPC 'Gekko' processor running at 485Mhz and a customised chip from ArtX (now owned by ATI) called Flipper. Both of these chips access the 40Mb of main memory, comprising of 24Mb of Mosys 1-T SRAM (1 Transistor Static RAM) and 16Mb of 61Mhz DRAM, through a bus capable of delivering 2.6GB/s of memory bandwidth. The 24Mb Mosys memory area is intended to be used for bandwidth intensive operations, such as graphics, while the 16Mb DRAM area is intended to be used for audio and other low-priority operations. The processor is built on a 0.18 micron CPU and is based around IBM's PowerPC 750 core, featuring 64Kb of L1 (32Kb instruction, 32Kb data) and 256Kb of on-die L2 cache. The Flipper chip contains North bridge and South bridge along with a graphics core and audio subsystem. The graphics core within Flipper runs at a clock speed of 162Mhz and contains 2Mb of Embedded SRAM for use as a frame buffer and 1Mb for use as a texture cache (6:1 S3TC texture compression is used to effectively increase the texture cache to around 6MB). The embedded memory gives a very fast 10.4GB/s bandwidth to texture memory and the frame buffer. The graphics core, running at 162Mhz, provides a fill rate of probably 648Mpixels/s and 648Mtexels/s (4 pixel pipelines, 1 texture unit per pipeline) and contains a (mostly!) fixed-function T&L pipeline (like GeForce/GeForce2). Nintendo states that the T&L unit provides around 6-12 million polygons/s throughput, although some say this is a low estimate and the real performance of the part is somewhere in the region of 20-30 million polys/s. The audio subsystem of flipper is powered by a custom Macronix 16-bit DSP running at 81Mhz, providing 64 simultaneous audio channels and ADPCM encoding. Storage is provided by a proprietary format 3.2in 1.5Gb optical disc.
Mac OS X (10.1) was released on September 25th. This version of Mac OS X adds all the functionality which was expected to be included in the first release but wasn't due to time constraints. This includes support for DVD playback, CD writing in the Finder, full filename display and improved Aqua aesthetics. In addition to enhanced functionality, Mac OS 10.1 features significant performance improvements over the original Mac OS X in 2D performance, file copying, OpenGL, Startup, Java, Application start and more.
Q3 01
i815G chipset is expected to be released in Q3. The i815G is a cut down version of the i815 stepping B which is intended to replace the i810E2. The i815G features support for Tualatin processors and PC133 SDRAM, both of which are missing from the i810E2. The i815G features integrated i752 graphics, but doesn't have support for an AGP slot, and features the ICH controller hub providing support for ATA-66, two USB ports and integrated audio.
i815EG chipset is expected to be released in Q3. The i815EG is identical to the i815G - i.e. the i815 stepping B without an AGP slot - but with the ICH2 controller rather than the older ICH controller. The ICH2 South Bridge provides support for ATA100, Dual USB hubs (four USB connectors), enhanced audio & a CNR (Communications Network Riser) slot to replace the AMR (Audio Modem Riser) slot supported by ICH.
Micron Mamba chipset (North Bridge only) for the AMD platform is expected to be released in Q3. In addition to DDR SDRAM support, Mamba will also feature 8Mb of L3 cache on the chipset die. The L3 cache will have a sustainable memory bandwidth of 9.6GB/s.
Micron Scimitar chipset for the AMD platform is expected to be released in July. Scimitar is expected to feature a Mamba core with integrated on-die Rendition graphics.
ServerWorks SS IV Pentium 4/Foster chipset is expected to be released in Q3. The SS IV is a workstation class chipset, supporting dual processor operation (Foster) and interfacing to DDR SDRAM.
VIA Matthew integrated CPU is expected to be released in Q3 at an initial clock speed of 700Mhz+. Matthew is a fully integrated CPU based on a 0.15 micron process, originally designed to compete with the now cancelled Intel Timna. Matthew will contain a Cyrix III Samuel II CPU core along with an integrated North Bridge (codenamed Twister) and integrated S3 Savage MX graphics. The intended market for Matthew is for mobile and small form factor desktops, due to its size and low power consumption.
VIA KM266 chipset is expected to be released in Q3 for the AMD platform. The KM266 is the DDR version of the KM133 (AMD Socket A chipset - 200Mhz FSB, 2Gb PC133 SDRAM, ATA100, 4XUSB, integrated Savage 4 graphics core, AGP4X slot). The graphics core will be based around S3's Paramount engine which is expected to deliver around 40% higher performance than the Savage4 present in the KM133/PM133.
VIA PM266T chipset is expected to be released in Q3 for the Pentium III platform (and P4?). The PM266T is a minor modification of the PM266 and essentially an Apollo Pro 266 (Intel DDR chipset) with an integrated Savage 4 Paramount graphics core and Tualatin support but without external AGP support. The Paramount core will feature a clock speed of 150Mhz or more, 1 pipeline with 2 texture units and a 64-bit memory interface (to DDR).
