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01/01
Intel Celeron 800 was released on January 3rd. The Celeron 800 is the first member of the Celeron family to have a 100Mhz FSB speed.
Intel Pentium 4 1.3Ghz was released on January 3rd. This low clocked version was released in order to aid the P4's transition to the Mainstream market.
Intel i810E2 chipset was released on January 3rd. The i810E2 combines the North Bridge of the i810E with the ICH2 South Bridge (as found on the i815E). Essentially this means that the i810E2, like the i810E, does not feature an AGP4X slot or support for PC133 SDRAM (although the FSB can run at 133Mhz, the memory interface is limited to 100Mhz). The ICH2 South Bridge will provide support for ATA100, Dual USB hubs, enhanced audio & a CNR (Communications Network Riser) slot to replace the i810E's AMR (Audio Modem Riser) slot.
VIA Cyrix III (Samuel II core) was released on January 5th, with clock speeds of 600, 650 and 667Mhz. Samuel II is the third core of the Cyrix III processor (the previous two being Joshua and Samuel) and features 64Kb of on-die, exclusive L2 cache in addition to the 128Kb L1 cache found on the previous Samuel core. As with Samuel, the Samuel II core is Socket 370 compatible, with FSB speeds of 100 and 133Mhz (667Mhz +). The processor is built on a 0.15 micron process with a 1.5v core voltage. The low core voltage and small die size means that these Cyrix III processors do not require active cooling. Performance is very poor compared to other desktop CPU's - e.g. AMD's Duron and Intel's Celeron - although the Cyrix III is aimed more at the Internet appliance market where cost and power usage are more of an issue.
AMD Duron 850Mhz was released on January 8th.
AMD Price Cuts occurred on January 8th. See the CPU Prices page for additional information.
Mobile Duron 600 & 700Mhz were released on January 15th. These mobile processors are built around the Spitfire core and therefore have a relatively high power consumption, with the 600Mhz model dissipating 20W and the 700Mhz model 24W. Both chips run at a core voltage of 1.4v.
VIA KT266 chipset started shipping in quantity on January 15th for the AMD platform, following its announcement in September. The KT266 is the DDR-capable successor to the popular KT133 chipset for Socket A AMD CPU's featuring support for PC1600/2100 DDR SDRAM, 6 channel AC97 Audio, an integrated MC97 modem, integrated 10/100 BaseT Ethernet controller, 6 USB ports and ATA100. The north and south bridges are connected with VIA's V-Link bus.
VIA Cyrix III 700 was released on January 18th.
DirectX 8.0a was released on January 25th, and is the successor to DirectX 8. DirectX 8.0a is a minor service release only fixing installation issues on International Windows 2000 installations and buttons being disabled for some input devices.
AMD Athlon 1Ghz, 1.13Ghz & 1.2Ghz on a 266Mhz FSB started shipping on January 26th. While these CPU's were originally announced on October 30th, AMD have had to wait until chipsets supporting 266Mhz FSB speeds became readily available before volume shipments could begin.
Intel Price Cuts occurred on January 28th. See the CPU Prices page for additional information.
Mobile Ultra Low Power Pentium III 500Mhz was released on January 30th. This processor operates at less than 1C and consumes less than 0.5V when running in SpeedStep mode at 300Mhz. These Ultra Low power processors are designed for the value sub-notebook segment.
Mobile Ultra Low Power Celeron 500Mhz was released on January 30th. See the ULP PIII entry above for details.
02/01
Netscape 6.01 was released on February 8th. This release sees an increase in performance as well as general improvements over version 6.00.
Compaq Alpha 21264 833Mhz (EV68) was released on February 12th. This processor is manufactured by IBM on their 0.18 micron process.
Microsoft Office XP RC1, formally known as Office 10, was released on February 17th.
ATI Radeon VE (RV100) was released on February 19th. The VE is a cut down version of the standard ATI Radeon targeted mainly at business users. The Radeon VE features a 183Mhz core/memory clock running over a 64-bit DDR memory bus (equivalent to 183Mhz SDR on a standard 128-bit bus) and is built on a 0.18 micron process. The architecture is a cut down version of the standard Radeon, featuring a single rendering pipeline with 3 texture units and no Charisma T&L engine. The RAMDAC is also clocked lower than the other members of the Radeon family - 300Mhz rather than 360Mhz. The maximum fill rate of the Radeon VE will therefore be 183MPixels/s and 550Mtexels/s (compared to the GeForce2 MX's 350MPixels/s and 700MTexels/s). Performance is considerably better than the Matrox G450 (approximately twice the frame rate in most games), but still noticeably inferior to the Radeon SDR and GeForce2 MX. The Radeon VE also contain ATI's Hydravision dual-monitor output technology, licensed from Appian. The price for the Radeon VE is $119, or $99 after a $20 rebate.
Microsoft Visual Studio 6 SP5 was released on February 21st. SP5 can be downloaded from here.
nVidia GeForce3 (NV20) was announced on February 22nd at Macworld Expo in Tokyo, with boards expected to become available in volume towards the end of March. The GeForce3 is built on a 0.15 micron process, with a core clock speed of 200Mhz and a memory clock of 230Mhz DDR (460Mhz). The core is significantly revised consisting of 57 million transistors (compared to 27M in the GF2) and having processing power of 800billion ops/s and 76Gflops. The design of the GeForce3 has concentrated on implementing a full DirectX8 featureset as well as reducing the memory bandwidth requirement which was the major performance bottleneck of the GeForce2 series. The architecture features 4 rendering pipelines with 2 texture units per pipeline giving a raw fill rate of 800Mpixels/s and 1.6Gtexels/s - identical to that of the GeForce2 GTS. Although the raw fill rate is less than the 1Gpixel / 2Gtexels/s provided by the GF2 Ultra, the GeForce2 series was almost always limited by its available memory bandwidth and these raw fillrates are never reached in practice.
The GeForce3 tackled the memory bandwidth limitations of the GeForce2 in a similar way to ATI's Radeon. nVidia's Lightspeed architecture is similar to ATI's HyperZ technology in that it features Z-buffer occlusion culling, fast Z-buffer clears and Z-buffer compression. Additionally, access to memory has been made more efficient by breaking up the single 128-bit memory controller into 4x32-bit memory controllers linked to memory with a crossbar switch. This maximises memory access efficiency by allowing memory access on smaller chunks of data to be made in parallel - e.g. with DDR memory (i.e. 2 data items per clock) 64bits can be accessed through a single memory controller, leaving the remaining 192bits of bandwidth (3 memory controllers) available for other tasks. Memory bandwidth has also been saved by nVidia's new Quincunx High Resolution Anti Aliasing technology. Rather than using a bandwidth-hungry supersampling algorithm, Quincunx uses a multisampling algorithm which results in quality similar to 4XFSAA with the performance of 2XFSAA. Quincunx HRAA operates on the same buffer as 2X supersampling (i.e. the image is rendered at twice the normal resolution) but has almost as many input points as are used in 4X supersampling. The architecture of the GeForce3 also allows for the application of up to 4 textures per pass (although this takes 2 clock cycles), which requires two passes in the GeForce2 - although both schemes use the same number of clock cycles, two passes require the Z and colour data to be refetched which puts additional strains on the available memory bandwidth.
The main features of the GeForce3 are the nFiniteFX programmable vertex and pixel shaders. The vertex processor is a fully programmable transformation engine, replacing the functionality of the hard-wired Transformation and Lighting (T&L) engine found in the GeForce2. The T&L engine of the GeForce2 is still present in the GeForce3 for backwards compatibility, however. The vertex processor allows programmers to write their own transformation and lighting functions with the use of nVidia's Vertex Shader Instruction set. These 128 instruction programs act upon the vertices of the 3D scene (which include x,y,z position, weight, colour data, vertex normal, fog, point size, potentially multiple texture coordinates and more) to allow effects such as morphing, key frame animation, per-vertex motion blur and per-pixel lighting effects such as dot-product bump mapping. The second part of the nFiniteFX engine is the pixel shader, which converts the 3D data and texture information into a 2D image. The pixel shader allows programmers to run 12 instructions programs with up to 8 texture blending operations on up to 4 textures (remember the GF3 can apply up to 4 textures per pass, although only 2 per clock).
The GeForce3 does not feature support for TwinView and its 2D and video featureset are as those of the GeForce2 GTS.
Initial performance figures and estimates place the GeForce3 is a similar league to the GeForce2 Ultra for current DX7 games, although the performance of certain features is noticeably higher - particularly anti-aliasing. We will only see the true power of this board with the advent of DirectX 8 games which are currently targeted towards Christmas 2001. Boards built around the GeForce3 are expected to retail for between $450-500 (perhaps $600!) with 64Mb of on-board memory.
Micron Copperhead chipset for the Pentium III platform was announced on February 26th in its prototype form. The North bridge (Copperhead) has support for up to 8Gb of PC1600/PC2100 DDR SDRAM, PCI-X and PCI rev 2.2. The South bridge (Coppertail) features ATA100 and 4xUSB 1 ports but no ISA support. Commercial shipments of Copperhead are possible if there is sufficient demand.
Mobile Low Power Pentium III 700Mhz was released on February 29th.
03/01
Microsoft Office XP Corporate Preview was released on March 1st. The Corporate Preview can be purchased for $19.95 and will expire on August 31st.
Intel Price Cuts occurred on March 4th. See the CPU Prices page for additional information.
AMD Price Cuts occurred on March 5th. See the CPU Prices page for additional information.
Microsoft Office XP was Released To Manufacturing on March 5th.
Internet Explorer 5.01 SP2 was released on March 6th.
nVidia GeForce2 MX 200 is the mid-range version of the GeForce2MX announced on March 7th with availability expected in Mid March. The GF2MX 200 will feature 32Mb of SDR SDRAM running over a 64-bit bus. The GF2MX 200 is expected to be clocked lower than the current GF2MX. The clock speed of this part is 175Mhz.
nVidia GeForce2 MX 400 is the high-end version of the GeForce2MX range announced on March 7th with availability expected in Mid March. The GF2MX 400 is a higher clocked version of the current GeForce2 MX, featuring a 128bit SDR/64-bit DDR bus with support for up to 64Mb of SDRAM. The clock speed of this part is 200Mhz.
STM Kyro II graphics chip was announced on March 9th, with the first cards expected in Mid April. Intended to compete with the GeForce2 MX 400, the Kyro II is essentially a higher clocked version of the Kyro I, featuring the same tile-based architecture as found on the Kyro I which was similar to previous Videologic/NEC PowerVR graphics processors. The Kyro II is built on a 0.18 micron process and features a core and SDR SDRAM clock speed of 175Mhz, two pixel pipelines with one texture per pipeline, EMBM, 2x and 4x FSAA, S3TC support and a 270Mhz RAMDAC. The Kyro II does not feature on-board T&L, let alone programmable pixel and vertex shaders like the GF3. Cards based around the Kyro II will feature SDR SDRAM linked to the chip over a 128 bit bus. Conventional graphics chips require a great deal of memory bandwidth, but the tile-based architecture of the Kyro II minimises overdraw, and therefore reduces the memory bandwidth requirement. This allows the Kyro II to use lower-cost SDR SDRAM without the performance penalty associated with SDR memory and conventional GPU's.
Although the maximum fillrate of Kyro II is only 350Mpixels/s and 350Mtexels/s, the tile based architecture is virtually 100% efficient - i.e. only those pixels which are to be displayed on screen get rendered. The 'effective' fill rate of the Kyro II is quoted as 1.4Gpixels/s, although this is assuming an overdraw of 4 which is rather excessive! In current games the overdraw is usually around 3, giving the Kyro II an 'effective' fill rate of 1050Mpixels/s and 1050Mtexels/s - this is still a very respectable number when compared to a GeForce2 GTS (800Mpixels/s, 1.6Gtexels/s) and a GeForce2 Ultra (1Gpixels/s, 2Gtexels/s). Note that the 'effective' fill rate is the fill rate required by a conventional card to achieve the same performance as the Kyro II.
Initial benchmarks are very promising, especially for the price range. The Kyro II performs somewhere between the GeForce2 GTS and GeForce2 Pro in Quake III. In other games, the performance varies considerably. At the lower end we see performance around the level of the Radeon SDR/GeForce2 MX. At the upper end we see even better performance than the high-end GeForce2 Ultra! The first card based around the Kyro II is the 64Mb Hercules 3D Prophet 4500 which is expected to retail for $149.
SiS 635 chipset for Intel PIII and Tualatin was announced on March 13th. The SiS 635 is a single chip solution, containing both the North and South bridges. The North and South bridges are internally connected by SiS's Multi-threaded I/O link which has a bandwidth of 1.2GB/s. The SiS 635 supports both SDRAM and DDR SDRAM, AGP4X, 6 PCI masters, ATA100, up to 6 USB ports, AC '97 audio/modem, 10/100 Ethernet or 1/10M Home PNA and AMR, ACR or CNR slots. The performance of the 635 is expected to be slightly faster than VIA's Apollo Pro 266 in Winstone and 3D Mark.
SiS 633 chipset for Intel PIII and Tualatin was announced on March 13th. The SiS 633 is the lower cost version of the SiS 635, featuring SDRAM support only.
Mobile Pentium III 900Mhz & 1Ghz was released on March 19th. The 1Ghz model operates at 1.7V and has a maximum power output of 24.8W. When the CPU is operated in SpeedStep mode (i.e. off battery) the voltage is reduced to 1.35V and the chip is run at 700Mhz. The power output in SpeedStep mode is 2W. It is interesting to note that the CPU runs on a 100Mhz FSB - i.e. 10x100 or 7x100 in SpeedStep.
Mobile Celeron 750Mhz was released on March 19th.
ALI Aladdin Pro 5T chipset for the Intel P3/Celeron platform was released on March 19th. The Aladdin Pro 5 supports both DDR and SDR SDRAM and has support for future Pentium 3 Tualatin processors.
Intel Pentium III Xeon 900Mhz (2Mb L2) was released on March 21st.
Intel i815E/i815EP Stepping B was announced on March 21st. Stepping B will provide support for Tualatin processors. First samples will be made available to manufacturers on April 13th, with mass shipments starting on May 15th.
AMD Athlon 1.3 and 1.33Ghz were released on March 22nd. These processors will be the last Athlons based around the Thunderbird core.
Windows XP Beta 2, formally known as Whistler, was released on March 23rd. Beta 2 includes DirectX 8, Windows Media Player 8, IE6, Firewall facilities, Remote Desktop, Remote Assistance and the new 'Luna' User Interface. The Server editions include drag-and-drop object management in Active Directory (AD), a Resultant Set of Policy (RsoP) feature to perform "what if" scenarios before committing changes, cross-forest management capabilities, a new version of the Microsoft Management Console (MMC), and a number of AD-related bug fixes.
Internet Explorer 6 Public Preview was released with on March 23rd.
Mac OS X was released on March 24th, priced at $129.
VIA C3 733Mhz (Samuel II core) was released on March 25th. Formally known as the Cyrix III, this processor contains 64Kb of on-die L2 cache in addition to the 128Kb Level 1 cache found on the previous Samuel core. See the Samuel II core Roadmap entry above for additional information.
Intel i815P was released on March 27th. The i815P combines the North Bridge of the i815EP (i.e. it does not contain integrated i752 graphics) with the South Bridge of the i815 (i.e. ICH).
VIA KT133E chipset was released in March. The KT133E is essentially a KT133 (AMD chipset, 200Mhz FSB) built on a 0.18 micron process (rather than 0.25) with support for AMD's PowerNow! technology featured in the upcoming Morgan (Duron) and Palomino (Athlon) processor cores. Unlike the KT133A, the KT133E does not support processors with 133Mhz DDR (266Mhz) FSB speeds. The reduced die size of the KT133E will mean that it sells for a cheaper price than the KT133 chipset it replaces.
Intel Pentium 4 Stepping C-1 is expected to be released in March, ready for the release of the 1.7Ghz P4 in April. Few changes have been made to the existing B-2 stepping aside from increasing the core voltage from 1.7 to 1.75V.
VIA PM266 chipset is expected to be released in March. The PM266 is essentially an Apollo Pro 266 (Intel DDR chipset) with an integrated Savage 4 graphics core.
VIA KL133A chipset is expected to be released in Q1 for the AMD platform The KL133A is a minor modification of the KL133 and the 'light' version of the KM133, (AMD, SDR) including 266Mhz FSB support and an integrated Savage 4 graphics core but excluding external AGP support.
